Electronics and Communications Engineering

Ph.D. Kakatiya University, Telangana

FPGA IMPLEMENTATION OF ENHANCED SPECTRUM SENSING IN COGNITIVE RADIO USING OPTIMAL ALGORITHMS Supervisor: Dr. K. Bikshalu, Assoc. Professor, Kakatiya University

M.Tech. with 84% , Kakatiya Institute of Technology & Science, Warangal, Telangana

B.Tech. with 69.96%, Anurag Engineering College, Kodad, Telangana

Intermediate with 90.4%, Shathavahana Jr College, Huzurabad, Telangana

SSC with 69%, ZPSS, Metpally, Karimnagar, Telangana

Asst. Professor, Vidya Bharathi Institute of Technology, Jangoan, Telangana, Taught digital design and field theory related subjects

Asst. Professor, Sree Chaitanya College of Engineering, Karimnagar Taught Signal processing related subjects

Conducted literature survey and ethical review development for research Focusing on the challenges of various spectrum sensing algorithms in CR

Deign And Simulation of RF MEMS Switch using COMSOL Tools

In-charge of Examination Cell, Vidya Bharathi Institute of Technology

In-charge of Examination Cell, Vidya Bharathi Institute of Technology Jangoan, Telangana

Head of the Dept., Vidya Bharathi Institute of Technology, Jangoan, Telangana

S. Nareshkumar and K. Bikshalu, “Implementation of AAS for Cognitive Radio Spectrum Sensing using Truncation Multiplier" ,Solid State Technology, Vol.64, issue-2, pp.4261-4267, 2021 (SCOPUS -Published)

S. Nareshkumar and K. Bikshalu, ” Cognitive Radio Spectrum Sensing using Truncation multiplier-SQRT based CSLA”, International of Future Generation Communication and Networking (ESCI-Accepted)

S. Nareshkumar and K. Bikshalu, “FPGA Implementation of Adaptive Absolute SCORE Algorithm for Cognitive Radio Spectrum Sensing with WTM and LFA ", International Journal of Intelligent Engineering and Systems, Vol.14, No.1, 2021 (SCOPUS-Published)

S. Nareshkumar, and K. Bikshalu, “Adaptive absolute SCORE algorithm for spectrum sensing in cognitive radio”,Microprocessors and Microsystems, Vol.69, pp.43-53, 2019 (SCI-published)

S Naresh Kumar, G Amarnath, B Sujatha and Dr. K Srinivasa Rao “ Implantation of low-cost novel RTL Modeling of spectrum sensing in cognitive radio networks” in International Journal Of Pure And Applied Mathematics Volume 117 no.19 2017,ISSN- 1311-8080- 189-194 (SCOPUS-published)

S Naresh Kumar, G Amarnath, B Sujatha and Dr. K Srinivasa Rao “ Implantation of low-cost novel RTL Modeling of spectrum sensing in cognitive radio networks” in International Journal Of Pure And Applied Mathematics Volume 117 no.19 2017,ISSN- 1311-8080- 189-194 (SCOPUS-published)

S. Naresh Kumar “Probability Measurement of Setup and Hold Time with Statistical Static Timing Analysis” in IJERA ISSN: 2248-9622, Vol. 5, Issue 1(part 1), January 2015,pp.38-41

S. Nareshkumar “Congestion And Power Reduction By Using Merged Flip Flops” in IJECCE Volume 5, Issue 6, ISSN (on line):2249-071X,ISSN (print):2278-4209,2014

4th to 6th October-2018 in JNTUH” the presented paper titled ”An Improved Fault Tolerant Machine Learning for Nano scale Cognitive Radio Networks”

6th international conference on Computing, Communication and Sensor Networks 30th and 31st December, 2017, in Kolkata, India” and the Presented paper titled “Design and Simulation of Circular CSRR Type tunable rectangular patch antenna loaded with RF MEMS SWITCH

Mentor to the students (ID-1255043) who participated in DST& Texas IICDC (India Innovation Challenge Design Contest-2019) and shortlisted to the Quarterfinals Round

Attended 15-Faculty Development Programs at National/International Exhibition and got attended certificates

Attended 5-Workshops at National/International Exhibition and got accredited attended certificates

Attended 12-Webinars at National/International level and got attended Certificates

Attended 26-Online Quizzes at National/International level and got Certificates

SWAYAM Certification- for course CMOS Digital VLSI Design-Jan-March-20

SWAYAM Certification- for course TALE2: Course Design & instruction of Engineering Course-July-Sept-2019

UGC-NET-DEC-2013 Qualified

Qualified FET-2012 conducted by JNTUH

Programming in VHDL & VERILOG, MATLAB, MASM, COMSOL and Overview of C and Java